From the course: Computer Architecture Essentials
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Hardware support for paging
From the course: Computer Architecture Essentials
Hardware support for paging
- [Instructor] This diagram shows that each process has its page table, which keeps track of the location of all pages in the process private memory, that's the virtual address and the location of those pages in the physical memory, that's the physical address. What the diagram does not show is that those page tables are not hardware elements, but software tables in the data structure that handles each process so the page tables reside in memory. Think about that for a minute. These important tables have a crucial role in the OS, and yet they reside in the same memory where the pages of data that's being handled are located. Thus, it's reasonable to expect a few cache misses and page faults regarding the page tables, isn't it? The problem is that page tables need to be accessed for every memory access that requires reading the physical memory. In other words, when a page fault occurs, two accesses to memory and possibly to mass storage need to occur. One to fetch the page table and…
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